Introduction to Boundary Scan
Thursday January 17, 2019 – 9:30 AM – 10:30 AM GMT
An eye-opener in the world of structural testing using JTAG/boundary-scan aka IEEE Std 1149.1. Many electronics assemblies already include JTAG/boundary-scan test circuitry which is either underused or not used at all. This webinar aims to inform test and development engineers of the possibilities of this built-in test and device programming feature.
JTAG Testing (and more) using Core Emulation
Tuesday January 22, 2019 – 9:30 AM – 10:30 AM GMT
JTAG testing is synonymous with boundary-scan (IEEE Std 1149.1). However not all devices with a JTAG port support boundary-scan and some that do have restricted access to some signal pins, and what about access to analog functions such as built- in ADC and DAC in today’s micros? This webinar discusses how JTAG Technologies CoreCommander functions can be used to exploit the micro’s core
I2C and SPI – Board-level serial bus access using JTAG/Boundary-scan
Tuesday February 5, 2019 – 9:30 AM – 10:30 AM GMT
I2C and its close relation SPI are used extensively in today’s electronics designs for intra-device comms at board level. Using JTAG Technologies high-level libraries (in Python) makes it easy to communicate these parts and generate functional test and programming applications. This webinar explains more!